■ Single power supply operation

■ Manufactured on 110 nm MirrorBit process technology

■ Secured Silicon Sector region

❐ 128-word/256-byte sector for permanent, secure identification through an 8-word/16-byte random Electronic Serial Number, accessible through a command sequence

❐ Programmed and locked at the factory or by the customer

■ Flexible sector architecture

❐ 64Mb (uniform sector models): One hundred twenty-eight 32 Kword (64 KB) sectors

❐ 64 Mb (boot sector models): One hundred twenty-seven 32 Kword (64 KB) sectors + eight 4Kword (8KB) boot sectors

❐ 32 Mb (uniform sector models): Sixty-four 32Kword (64 KB) sectors

❐ 32 Mb (boot sector models): Sixty-three 32Kword (64 KB) sectors + eight 4Kword (8KB) boot sectors

■ Enhanced VersatileI/O™ Control

❐ All input levels (address, control, and DQ input levels) and outputs are determined by voltage on VIO input. VIO range is 1.65 to VCC

■ Compatibility with JEDEC standards

❐ Provides pin out and software compatibility for single-power supply flash, and superior inadvertent write protection

■ 100,000 erase cycles typical per sector

■ 20-year data retention typical Performance Characteristics

■ High performance

❐ 90 ns access time

❐ 8-word/16-byte page read buffer

❐ 25 ns page read time

❐ 16-word/32-byte write buffer which reduces overall programming time for multiple-word updates

■ Low power consumption

❐ 25 mA typical initial read current, 1 mA typical page read current

❐ 50 mA typical erase/program current

❐ 1 µA typical standby mode current

■ Package options

❐ 48-pin TSOP

❐ 56-pin TSOP

❐ 64-ball Fortified BGA

❐ 48-ball fine-pitch BGA Software and Hardware Features

■ Software features

❐ Advanced Sector Protection: offers Persistent Sector Protection and Password Sector Protection

❐ Program Suspend & Resume: read other sectors before programming operation is completed

❐ Erase Suspend & Resume: read/program other sectors before an erase operation is completed

❐ Data# polling & toggle bits provide status

❐ CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices

❐ Unlock Bypass Program command reduces overall multiple-word programming time

■ Hardware features

❐ WP#/ACC input accelerates programming time (when high voltage is applied) for greater throughput during system production. Protects first or last sector regardless of sector protection settings on uniform sector models

❐ Hardware reset input (RESET#) resets device

❐ Ready/Busy# output (RY/BY#) detects program or erase cycle completion

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