RF output frequency range: 53.125 MHz to 6800 MHzInteger channel: −227 dBc/HzFractional channel: −225 dBc/HzIntegrated RMS jitter(1 kHz to 20 MHz): 97 fs for 6 GHz outputFractional-N synthesizer and integer-N synthesizerPin compatible to the ADF4355

High resolution, 52-bit modulusPhase frequency detector (PFD) operation to 125 MHzReference input frequency operation to 600 MHzMaintains frequency lock over −40°C to +85°CLow phase noise,

voltage controlled oscillator (VCO)Programmable divide by 1, 2, 4, 8, 16, 32, or 64 outputAnalog and digital power supplies: 3.3 VCharge pump and VCO power supplies: 5.0 V typicalLogic compatibility: 1.8 VProgrammable output power levelRF output mute functionSupported in the ADIsimPLL design tool

APPLICATIONS

Wireless infrastructure (LTE, W-CDMA, TD-SCDMA,WiMAX, GSM, PCS, DCS)

Point to point/point to multipoint microwave links

Satellites/VSATs

Test equipment/instrumentation

Clock generation

GENERAL DESCRIPTION

The ADF4356 allows implementation of fractional-N or integer-Nphase-locked loop (PLL) frequency synthesizers when used withan external loop filter and an external reference frequency.

A seriesof frequency dividers at another frequency output permitsoperation from 53.125 MHz to 6800 MHz.The ADF4356 has an integrated VCO with a fundamentaloutput frequency ranging from 3400 MHz to 6800 MHz. Inaddition, the VCO frequency is connected to divide by 1, 2, 4, 8,16, 32, or 64 circuits that allow the user to generate RF outputfrequencies as low as 53.125 MHz.

For applications that requireisolation, the RF output stage can be muted. The mute functionis both pin- and software-controllable.Control of all on-chip registers is through a simple 3-wire interface.

The ADF4356 operates with analog and digital power suppliesranging from 3.15 V to 3.45 V, with charge pump and VCOsupplies from 4.75 V to 5.25 V. The ADF4356 also containshardware and software power-down modes.

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