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Automotive LPDDR SDRAM MT46H128M16LF – 32 Meg x 16 x 4 Banks MT46H64M32LF – 16 Meg x 32 x 4 Banks ic

  • Author:lulu
  • Source:www.ic-stocks.com
  • Release on :2018-11-05
Features

• VDD/VDDQ = 1.70–1.95V

• Bidirectional data strobe per byte of data (DQS)

• Internal, pipelined double data rate (DDR) architecture; two data accesses per clock cycle

• Differential clock inputs (CK and CK#)

• Commands entered on each positive CK edge

• DQS edge-aligned with data for READs; centeraligned with data for WRITEs

• 4 internal banks for concurrent operation

• Data masks (DM) for masking write data; one mask per byte

• Programmable burst lengths (BL): 2, 4, 8, or 16

• Concurrent auto precharge option is supported

• Auto refresh and self refresh modes

• 1.8V LVCMOS-compatible inputs

• Temperature-compensated self refresh (TCSR)2

• Partial-array self refresh (PASR)

• Deep power-down (DPD)

• Status read register (SRR)

• Selectable output drive strength (DS)

• Clock stop capability

• 64ms refresh; 32ms for the automotive temperature range

Options Mark

• VDD/VDDQ – 1.8V/1.8V H

• Configuration

– 128 Meg x 16 (32 Meg x 16 x 4 banks) 128M16

– 64 Meg x 32 (16 Meg x 32 x 4 banks) 64M32

• Addressing – JEDEC-standard LF

• Plastic "green" package

– 60-ball VFBGA (8mm x 9mm) DD

– 90-ball VFBGA (8mm x 13mm) BQ

• Timing – cycle time

– 4.8ns @ CL = 3 (208 MHz)

-48

• Special Options

– Automotive (package-level burn-in) A

• Operating temperature range

– From –40˚C to +85˚C IT

– From –40˚C to +105˚C1 AT

• Design revision :C Notes:

1. Contact factory for availability.

2. Self refresh supported up to 85 ºC.

MT46H64M32LFBQ-48IT:C New and Original in the stock, welcome to send the request to us!

Contact us if you have any questions or need help.

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