• Asynchronous 8-bit parallel load
• Synchronous serial input
• Output capability: standard
• ICC category: MSI
The 74HC/HCT165 are high-speed Si-gate CMOS devicesand are pin compatible with low power Schottky TTL(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT165 are 8-bit parallel-load or serial-in shiftregisters with complementary serial outputs (Q7 andQ7) available from the last stage. When the parallel load(PL) input is LOW, parallel data from the D0 toD7 inputs are loaded into the register asynchronously.
When PL is HIGH, data enters the register serially at theDs input and shifts one place to the right(Q0 → Q1 → Q2, etc.) with each positive-going clock
This feature allows parallel-to-serial converterexpansion by tying the Q7 output to the DS input of thesucceeding stage.The clock input is a gated-OR structure which allows oneinput to be used as an active LOW clock enable (CE) input.
The pin assignment for the CP and CE inputs is arbitraryand can be reversed for layout convenience. TheLOW-to-HIGH transition of input CE should only take
place while CP HIGH for predictable operation. Either theCP or the CE should be HIGH before the LOW-to-HIGH transition of PL to prevent shifting the data
when PL is activated.
• Parallel-to-serial data conversion
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