The SM59R16G6 is a 1T (one machine cycle per clock) single-chip 8-bit microcontroller. It has 64K-byte embedded Flash for program, and executes all ASM51 instructions fully compatible with MCS-51.

SM59R16G6 contains 1KB on-chip RAM, more than 46 GPIOs (LQFP 48), various serial interfaces and many peripheral functions as described below. It can be programmed via writers.

Its on-chip ICE is convenient for users in verification during development stage. The high performance of SM59R16G6 can achieve complicated manipulation within short time.

About one third of the instructions are pure 1T, and the average speed is 8 times of traditional 8051, the fastest one among all the 1T 51-series.Its excellent EMI and ESD characteristics are advantageous for many different applications

Features

 Operating Voltage: 2.7V ~ 5.5V

 High speed architecture of 1 clock/machine cycle (1T), runs up to 25MHz

 1T/2T can be switched on the fly by SFR

 Instruction-set compatible with MCS-51

 64K/36K/20KBytes on-chip program memory.

 External RAM addresses up to 64K bytes. Standard 12T interface for external RAM access.

 256 bytes RAM as standard 8052, plus 1K bytes on-chip expandable RAM

 Dual 16-bit Data Pointers (DPTR0 & DPTR1)

 One serial peripheral interfaces in full duplex mode (UART0), Additional Baud Rate Generator for Serial 0.

 Three 16-bit Timers/Counters. (Timer 0 , 1, 2)

 38 GPIOs(PDIP 40)，42 GPIOs(PLCC 44/PQFP 44)，46 GPIOs(LQFP 48),GPIOs can select four Type(quasi-bidirectional、push-pull、open drain、 input-only)，default is quasi-bidirectional(pull-up)

 External interrupt 0,1 with four priority levels

 Programmable watchdog timer (WDT)

 One IIC interface (Master/Slave mode)

 One SPI interface (Master/Slave mode)

 4-channel PWM on port 2 or port 4 (default)

 4-channel 16-bit compare /capture /load functions

 22.1184MHz Internal RC oscillator, with programmable clock divider

 Configurable Oscillator pin

 ISP/IAP/ICP functions.

 ISP service program space configurable in N*256 byte (N=0 to 16) size.

 EEPROM function

 On-chip in-circuit emulator (ICE) function with On-Chip Debugger（OCD）

 ALE output select.

 LVI/LVR ±5% (LVR deglitch 500ns)

 Enhanced user code protection

 Power management unit for idle and power down modes