W9825G6KH is a high-speed synchronous dynamic random access memory (SDRAM), organized as4M words  4 banks  16 bits. W9825G6KH delivers a data bandwidth of up to 200M words persecond. To fully comply with the personal computer industrial standard, W9825G6KH is sorted into thefollowing speed grades:

-5, -5I, -6, -6I, -6J, -6L, -75, 75J and 75L.The -5/-5I grade parts are compliant to the 200MHz/CL3 specification (the -5I industrial grade which isguaranteed to support -40°C ≤ TA ≤ 85°C).The -6/-6I/-6J/-6L grade parts are compliant to the 166MHz/CL3 specification (the -6I industrial gradewhich is guaranteed to support -40°C ≤ TA ≤ 85°C, the -6J industrial plus grade which is guaranteed tosupport -40°C ≤ TA ≤ 105°C).

The -75/75J/75L grade parts are compliant to the 133MHz/CL3 specification (the 75J industrial plusgrade which is guaranteed to support -40°C ≤ TA ≤ 105°C).The -6L and 75L grade parts support self refresh current IDD6 max.

1.5 mA.Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can beaccessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVEcommand.

Column addresses are automatically generated by the SDRAM internal counter in burstoperation. Random column read is also possible by providing its address at each clock cycle.

Themultiple bank nature enables interleaving among internal banks to hide the precharging time.By having a programmable Mode Register, the system can change burst length, latency cycle,interleave or sequential burst to maximize its performance. W9825G6KH is ideal for main memory inhigh performance applications.

FEATURES

 3.3V ± 0.3V Power Supply

 Up to 200 MHz Clock Frequency

 4,194,304 Words

 4 Banks

 16 Bits Organization

 Self Refresh Mode: Standard and Low Power

 CAS Latency: 2 and 3

 Burst Length: 1, 2, 4, 8 and Full Page

 Burst Read, Single Writes Mode

 Byte Data Controlled by LDQM, UDQM

 Power Down Mode

 Auto-precharge and Controlled Precharge

 8K Refresh Cycles/64 mS, @ -40°C ≤ TA ≤ 85°C

 8K Refresh Cycles/16 mS, @ 85°C < TA ≤ 105°C

 Interface: LVTTL

 Packaged in TSOP II 54-pin, 400 mil - 0.80, using Lead free materials with RoHS compliant

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